1. Field of the Invention
The present invention relates to a semiconductor device having a circuit structured with thin film transistors (hereinafter, referred to as TFTs) and to a method for manufacturing the same. Particularly, the invention relates to an electro-optical device represented by the liquid crystal display panel and an electronic appliance mounted with such an electro-optical device as a part. Incidentally, in this description, the semiconductor device refers to the devices in general capable of functioning by the utilization of a semiconductor characteristic, i.e. an electro-optical device, a semiconductor circuit and an electronic appliance, in any, are fallen under a semiconductor device.
2. Description of the Prior Art
Recently, development has been proceeded for semiconductor devices having TFTs structured by using a thin film (thickness: approximately several to several hundred nm) formed on a substrate having an insulating surface to have a large-area integrated circuit forming TFTs. There is known an active-matrix liquid crystal display device as a representative example. In particular, the TFT using a crystalline silicon film in its active region is allowed to form various functional circuits because of its high electric-field mobility.
For example, the active-matrix liquid crystal display is formed, for each functional block, with a pixel circuit for image display, a shift register circuit based on a CMOS circuit, such driver circuits for controlling the pixel circuit as a level shifter circuit, a buffer circuit and a sampling circuit, on one substrate.
The TFT has, at least, a semiconductor film, an insulating film such as a silicon oxide film or a silicon oxide nitride film, an interconnections of various metal materials or the like, and a pixel electrode. The interconnections include a source interconnection and a gate interconnection (including a gate electrode). The source interconnection and the source electrode connected to the source region, in many cases, are connected through the other interconnection.
Meanwhile, of among the active-matrix liquid crystal displays, the liquid crystal projectors using small-sized liquid crystal panels have being spread at a rapid pace to broaden the field of use. Due to this, there are demands for convenience. Development has being continued in order to advance size reduction, brightness increase, definition enhancement and price reduction.
The active-matrix liquid crystal display, used in a liquid crystal projector or electronic apparatus display, has a pixel region structured with several million pixels. Each pixel is formed with a TFT, and the TFT of each pixel has a pixel electrode. A counter electrode is provided on the counter substrate sandwiching a liquid crystal, to form a kind of capacitor having a liquid crystal as a dielectric. The potential to be applied to each pixel is controlled under TFT switching function to control the charge to the capacitor. Thus, the liquid crystal is driven to control the amount of transmission light thereby displaying images.
Because the capacitor gradually decreases in its capacitance due to current leakage, it forms a cause to vary the amount of light transmission and hence decrease the contrast in image display. For this reason, in the conventional, there has been provided a capacitance interconnection to provide, in parallel, a capacitor (holding capacitance) separately from the capacitor having a liquid crystal as a dielectric. The holding capacitance serves to supplement a capacitance lost by the capacitor having a liquid crystal as a dielectric.
However, when trying to form, in the pixel region, a holding capacitance using a capacitance interconnection and secure a sufficient capacitance, the opening ratio must be sacrificed. Particularly, it is to be fully expected that pixel size reduction be continued for the small-sized high-definition liquid crystal display as used in the liquid crystal projector, as long as definition enhancement is sought together with size reduction. For example, in order to realize display with definition as high as XGA (1024xc3x97768 pixels) on a liquid crystal display of a diagonal 0.7-inch type, each pixel has an area of as small as 14 xcexcmxc3x9714 xcexcm. Meanwhile, even in the case of providing a contact hole with an area of 1-xcexcm square, the contact must be secured with an area of 3-xcexcm square by extending one side at least by 1-xcexcm each if considering a problem with coverage or the like. In the case of 14 xcexcm on one side of one pixel, when a 3-xcexcm-square contact is formed one, the opening ratio is lowered at least 4.6%. The number of contacts is of a significantly important problem amid the continuing pixel size reduction.
At present, brightness increase is coped with by increasing the opening ratio while definition enhancement is by increasing the number of pixels. However, amid continuing pixel size reduction, there is an extremely difficult problem in simultaneously satisfying the improvement in opening ratio and the increase in the number of pixels while designing a pixel structure with a sufficient capacitance secured. When trying to realize such a pixel structure, the number of processes naturally increases to make the process complicate. This results in a problem of worsened yield and semiconductor-device manufacture cost increase.
Meanwhile, there are cases that light leak current increases due to the light coming at a surface of a substrate not formed with TFTs of a light-transmission liquid crystal display or the light incident upon a top surface and irregularly reflected in the substrate, thus increasing an off-current (drain current flowing in a TFT off-state). The increase in leak current requires an increase of holding capacitance for compensation, causing a problem of lowering in opening ratio in the pixel region.
The present invention is an art for resolving the foregoing problem, and it is a problem to realize, by a reduced number of processes as compared to the conventional in respect of the structure of TFT and holding capacitance, a reliable active-matrix liquid crystal display device having a high opening ratio to make a display with definition. Meanwhile, it is a problem to realize high-definition image display even in a liquid crystal display device designed with a pixel size as small as ten and several xcexcm square and in an electronic apparatus using, in a display part, such liquid-crystal display device.
The present invention is characterized by: forming a gate electrode and source and drain interconnections in the same process, forming a first insulating film covering the gate electrode, the source and drain interconnections, forming an upper light-shielding film on the first insulating film, forming a second insulating film on the upper light-shielding film, partially etching the first and second insulating films to form a contact hole reaching the drain interconnection, and forming a pixel electrode on the second insulating film to connect to the drain interconnection. Meanwhile, holding capacitances are formed by the drain interconnection, the first insulating film and the upper light-shielding film as well as the upper light-shielding film, the second insulating film and the pixel electrode.
Meanwhile, the TFT has a semiconductor film including a channel region and source and drain regions, a gate insulating film and a gate electrode. The gate electrode is connected to a gate interconnection serving also as a lower light-shielding film formed in a lower level than the semiconductor film (close to the substrate).
In this manner, because the gate electrode and the source and drain interconnections are formed in the same process, the number of processes can be reduced. Specifically, reduced is the number of photo-masks required in fabricating TFTs. The photo-mask is used, in a photolithographic technique, to form a resist pattern mask on a substrate during an etching process. Consequently, the use of one photo-mask signifies an addition of the processes of resist stripping, cleaning and drying in the process of before or after the same, besides film deposition and etching, wherein trouble processes including resist application, pre-bake, exposure, development and post-baking are to be carried out in the photolithography process.
Meanwhile, by forming a gate electrode and source and drain interconnections in the same process, it is possible to reduce the number of levels as compared to that of the conventional. Due to this, the physical distance is decreased between the semiconductor film and the light-shielding film, thus making possible to prevent against the occurrence of current leakage due to light leak or diffraction.
Meanwhile, the direct connection between the source interconnection and the source region makes it possible to reduce the number of contacts and improve the opening ratio. Amid continuing pixel size reduction, it is very effective to reduce the number of contact holes to a possible extent in order for improving the opening ratio.
Meanwhile, by forming holding capacitances by the drain interconnection, the first insulating film and the upper light-shielding film as well as the upper light-shielding film, the second insulating film and the pixel electrode, a sufficient holding capacitance can be secured. The holding capacitance can be further made sufficient by making the first and second insulating films to films having a high dielectric constant or in a possibly small thickness.
A manufacturing method, disclosed in the present description, comprises: forming a first light-shielding film on an insulating surface; forming an underlying insulating film on the first light-shielding film; forming a semiconductor film over the first light-shielding film through the underlying insulating film; selectively introducing an impurity element to the semiconductor film to form a source region and a drain region; forming a first insulating film on the semiconductor film; partly etching the first insulating film to expose a part of the first light-shielding film, source region and drain region; forming a conductive film on the first insulating film; etching the conductive film to form a gate electrode, a source interconnection and a drain interconnection; forming a second insulating film contacted with the first insulating film, the gate electrode, the source interconnection and the drain interconnection; forming a second light-shielding film overlapping the first light-shielding film on the second insulating film; forming a third insulating film covering the second light-shielding film; partly etching the third insulating film to expose a part of the drain interconnection to form a pixel electrode.
In the manufacturing method, the material for forming a conductive film uses a heat-resistive conductive material and may be, typically, an element selected from Ta, W, Ti, Mo, Cu, Cr and Nd, or an alloy material or compound material based on the element. Meanwhile, may be used a semiconductor film represented by a crystalline silicon film introduced with an impurity element, such as phosphorus. Meanwhile, an AgPdCu alloy may be used. The conductive film may be not a single-layer but a layered structure having two or more layers, or may be a structure having a low-heat-resistive conductive material sandwiched by high-heat-resistive conductive materials.
In the manufacturing method, the impurity element is one or a plurality of elements selected from n-type-providing impurity elements and p-type-providing impurity elements.
Meanwhile, a semiconductor device manufactured by the manufacturing method is a semiconductor device comprising: a gate electrode formed over a semiconductor film through a first insulating film and source and drain interconnections connected to the semiconductor film being formed of a same conductive material; a holding capacitance formed by the gate electrode, a light-shielding film formed on the source and drain interconnections through a second insulating film, a third insulating film formed on the light-shielding film, and a pixel electrode formed on the third insulating film and electrically connected to the drain interconnection.
Meanwhile, another semiconductor device manufactured by the manufacturing method is a semiconductor device comprising: a gate electrode formed over a semiconductor film through a first insulating film and source and drain interconnections connected to the semiconductor film being formed of a same conductive material; a first holding capacitance formed by the gate electrode, a light-shielding film formed on the source and drain interconnections through a second insulating film, a third insulating film formed on the light-shielding film, and a pixel electrode formed on the third insulating film and electrically connected to the drain interconnection; and a second holding capacitance formed by the drain interconnection, the second insulating film and the light-shielding film.
In the semiconductor device, the material for forming a conductive film uses a heat-resistive conductive material and may be, typically, an element selected from Ta, W, Ti, Mo, Cu, Cr and Nd, or an alloy material or compound material based on the element. Meanwhile, may be used a semiconductor film represented by a crystalline silicon film introduced with an impurity element, such as phosphorus. Meanwhile, an AgPdCu alloy may be used. The conductive film may be not a single-layer but a layered structure having two or more layers, or may be a structure having a low-heat-resistive conductive material sandwiched by high-heat-resistive conductive materials.
In this manner, by forming a gate electrode and source and drain interconnections in the same process, it is possible to reduce the number of levels as compared to that of the conventional. Thus, yield is improved and semiconductor-device manufacturing cost is reduced. Meanwhile, because the number of levels can be decreased, the physical distance is decreased between the semiconductor film and the light-shielding film, thus making possible to prevent against the occurrence of current leakage due to light leak or diffraction. Furthermore, the direct connection between the source interconnection and the source region makes it possible to reduce the number of contacts and improve the opening ratio. Meanwhile, sufficient holding capacitance can be secured by forming holding capacitances by the drain interconnection, the interlayer insulating film and upper light-shielding film as well as the upper light-shielding film, the first insulating film and the pixel electrode.
Meanwhile, another structure of the invention is a semiconductor device having a pixel region and drive circuit on an insulating surface, the semiconductor device comprising:
in a TFT in the pixel region, a first gate electrode formed over a first semiconductor film through a first insulating film and first source and drain interconnections connected to the semiconductor film being formed of a same conductive material;
the first gate electrode being connected to a lower light-shielding film formed of conductive materials, formed beneath the semiconductor film; and
a holding capacitance formed by the first gate electrode, an upper light-shielding film formed on the first source and drain interconnections through a second insulating film, a third insulating film formed on the upper light-shielding film, and a pixel electrode formed on the third insulating film and electrically connected to the drain interconnection; and
in a TFT in the drive circuit, a second gate electrode formed over a second semiconductor film through a first insulating film and second source and drain interconnections connected to the semiconductor film being formed of a same conductive material; and
an interconnection formed of the same material as the lower light-shielding film being connected to the second gate electrode.
Meanwhile, in the above structure, the TFTs formed on the insulating film may all be n-channel TFTs or p-channel TFTs. Also, in the structure, the lower light-shielding film is at the beneath of a first semiconductor film of a pixel TFT, an interconnection same in material as the lower light-shielding film provided in the drive circuit is an extended line not to cross over with a second source interconnection or second drain interconnection (gate connected to the second gate electrode).